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TakeCharge® ESD Solution from Sofics Earns TSMC9000™Quality Approval in 65nm CMOS Process
Joins PowerQubic® 0.25um BCD High-Voltage IP on Approved List; Other On-Chip ESD/EOS Solutions Awaiting Approval.
Press published on the January 18th, 2012 - 8:30 AM ET
DecaWave ScenSor Chip Incorporates TakeCharge ESD Protection from Sofics
Customized Approach Delivers Robust Protection, Reduced Development Costs; Low Capacitance and Leakage Support RF Transceiver IC’s High Performance.
Press published on the February 22nd, 2012 - 8:30 AM ET
StarChip® Achieves First-Time-Right ESD Performance in SIM/Smartcard IC with Sofics TakeCharge® Technology
Technology ports smoothly to new foundry, meets high-end ESD specifications.
Press published on the December 20th, 2011 - 7:15 AM ET
Analog Devices Selects Sofics® to Develop On-Chip ESD Protection for 60V Products
PowerQubic® ESD/EOS Technology from Sofics Chosen to Enhance Product Reliability, Enable Maximum Performance, Reduce Cost.
Press published on the December 11th, 2012 - 7:30 AM ET
Sofics, ICsense Merge ESD and I/O Technologies, Deliver 3.3V Signalling on Icera’s 40nm, 1.8V I/O Baseband Chip
IP for World’s First True 3.3V I/O from 1.8V Transistors Now Available; TSMC 28nm Version in Development.
Press published on the January 27th, 2011 - 7:10 AM ET